Correctly selecting a MOSFET is a crucial step. A poorly chosen MOSFET can impact the efficiency and cost of the entire circuit. Understanding the subtle differences between various MOSFET components and the stresses they withstand in different switching circuits can help engineers avoid many problems. Below, we'll learn the correct methods for selecting MOSFETs.
Step 1: N-channel or P-channel? The first step in selecting the right device for your design is deciding whether to use an N-channel or P-channel MOSFET. In typical power applications, when a MOSFET is grounded and the load is connected to the mains voltage, it forms a low-side switch. In low-side switching, an N-channel MOSFET should be used due to the voltage required to turn the device on or off. When the MOSFET is connected to the bus and the load is grounded, a high-side switch is used. Typically, a P-channel MOSFET is used in this topology, also due to voltage drive considerations.
To select a suitable device for your application, you must determine the voltage required to drive the device and the easiest method to implement in your design. The next step is to determine the required rated voltage, or the maximum voltage the device can withstand. Higher rated voltages generally result in higher device costs. Based on practical experience, the rated voltage should be greater than the mains voltage or bus voltage. This provides sufficient protection to prevent the MOSFET from failing. When selecting a MOSFET, the maximum voltage that it may withstand between the drain and source, i.e., the maximum VDS, must be determined. It is crucial to know that the maximum voltage a MOSFET can withstand varies with temperature. Designers must test the voltage variation range across the entire operating temperature range. The rated voltage must have sufficient margin to cover this variation range to ensure the circuit does not fail. Other safety factors that design engineers need to consider include voltage transients induced by switching electronics such as motors or transformers. Rated voltages vary depending on the application; typically, 20V for portable devices, 20–30V for FPGA power supplies, and 450–600V for 85–220VAC applications.
Step Two: Determining the Rated Current The second step is to select the rated current of the MOSFET. Depending on the circuit architecture, this rated current should be the maximum current the load can withstand under all conditions. Similar to the voltage case, designers must ensure that the selected MOSFET can withstand this rated current, even when the system experiences current spikes. The two current scenarios to consider are continuous mode and pulse spikes. In continuous conduction mode, the MOSFET is in a steady state, and current flows continuously through the device. Pulse spikes refer to large surges (or peak currents) flowing through the device. Once the maximum current under these conditions is determined, simply select a device that can withstand this maximum current.
After selecting the rated current, conduction losses must be calculated. In reality, MOSFETs are not ideal devices because there are energy losses during conduction, known as conduction losses. When "on," a MOSFET acts like a variable resistor, determined by the device's RDS(ON), which varies significantly with temperature. The device's power dissipation can be calculated as Iload² × RDS(ON). Since the on-resistance changes with temperature, the power dissipation also changes proportionally. The higher the voltage VGS applied to the MOSFET, the smaller RDS(ON); conversely, the lower the voltage VGS, the higher the RDS(ON). For system designers, this is where trade-offs need to be made depending on the system voltage. For portable designs, using lower voltages is easier (and more common), while for industrial designs, higher voltages can be used. Note that the RDS(ON) resistance will increase slightly with current. Various electrical parameters regarding the RDS(ON) resistance can be found in the manufacturer's datasheet.
Designers should be reminded that the Id current specified in the MOSFET datasheet is generally the maximum normal operating current of the MOSFET chip. The actual maximum normal operating current is also limited by the package's maximum current limit. Therefore, customers should consider the package's maximum current limit when setting the maximum operating current in their product designs. It is recommended that customers consider the MOSFET's internal resistance parameters more importantly when setting the maximum operating current in their product designs.
Technology has a significant impact on device characteristics because some technologies often increase RDS(ON) when increasing the maximum VDS. For such technologies, if the goal is to reduce VDS and RDS(ON), the chip size must be increased, thus increasing the corresponding package size and related development costs. Several technologies exist in the industry that attempt to control the increase in chip size, the most important of which are channel and charge balancing technologies.
In channel technology, a deep trench is embedded in the chip, typically reserved for low voltage, to reduce on-resistance RDS(ON). To minimize the impact of maximum VDS on RDS(ON), epitaxial growth pillar/etch pillar processes are used during development. For example, Fairchild Semiconductor developed a technology called SuperFET, which adds additional manufacturing steps specifically for reducing RDS(ON). This focus on RDS(ON) is crucial because as the breakdown voltage of a standard MOSFET increases, RDS(ON) increases exponentially, leading to larger chip size. The SuperFET process transforms the exponential relationship between RDS(ON) and chip size into a linear one. Thus, SuperFET devices can achieve ideally low RDS(ON) with small chip sizes, even at breakdown voltages up to 600V. The result is a chip size reduction of up to 35%. For end users, this translates to a significant reduction in package size.
Step 3: Determining Thermal Requirements The next step in selecting a MOSFET is calculating the system's thermal requirements. Designers must consider two different scenarios: worst-case and real-world scenarios. It is recommended to use the worst-case calculation results, as this provides a larger safety margin to ensure the system does not fail. There are also some important measurement data points to note in the MOSFET datasheet; such as the thermal resistance between the semiconductor junction of the packaged device and the environment, and the maximum junction temperature.
The junction temperature of the device equals the maximum ambient temperature plus the product of the thermal resistance and power dissipation (Junction Temperature = Maximum Ambient Temperature + [Thermal Resistance × Power Dissipation]). The maximum power dissipation of the system can be solved from this equation, which is defined as I² × RDS(ON). Since the designer has determined the maximum current that will flow through the device, RDS(ON) at different temperatures can be calculated. It is worth noting that when dealing with simple thermal models, designers must also consider the thermal capacity of the semiconductor junction/device case and the case/ambient environment; that is, the printed circuit board and package must not heat up immediately.
Avalanche breakdown occurs when the reverse voltage on the semiconductor device exceeds its maximum value, creating a strong electric field that increases the current inside the device. This current dissipates power, raises the device temperature, and may damage the device. Semiconductor companies perform avalanche testing on devices to calculate their avalanche voltage or to test their robustness. There are two methods for calculating the rated avalanche voltage: statistical methods and thermal calculations. Thermal calculations are more widely used due to their practicality. Besides calculations, technology also significantly impacts the avalanche effect. For example, increasing wafer size improves avalanche resistance, ultimately increasing device robustness. For end users, this means using larger packages in their systems.
Step Four: Determining Switching Performance The final step in selecting a MOSFET is determining its switching performance. Many parameters affect switching performance, but the most important are the gate/drain, gate/source, and drain/source capacitances. These capacitances contribute to switching losses in the device because they are charged with each switch. This reduces the MOSFET's switching speed and decreases device efficiency. To calculate the total losses during switching, designers must calculate the losses during turn-on (Eon) and turn-off (Eoff). The total power of a MOSFET switch can be expressed by the following equation: Psw = (Eon + Eoff) × switching frequency. Gate charge (Qgd) has the greatest impact on switching performance.
